A Bet Against Iteration
An ASIC is a commitment device. You take a function, whatever it is, and stop asking whether it's still the best way to do the thing. You start asking how cheap and fast you can make exactly this, forever, with no branch for "or we could try it differently next quarter." That's the whole trade. Silicon doesn't get patched. It gets replaced.
Baking a model's weights into a chip is the same trade applied to something that, right now, nobody treats as finished. Every model shipped this year gets superseded by one shipped next quarter, usually from the same company, usually with a changelog that reads like an apology for the last version. Fine-tunes land weekly. Safety tuning gets revised after a bad headline. The entire pitch of the current AI market is that the thing keeps getting better, which is another way of saying the vendor has explicitly refused to sign the stasis contract that a mask set requires. Nobody who wants headline benchmark numbers next year is going to etch this year's weights into quartz.
Wake-word detection chips already do the thing people imagine when they say "AI in silicon," and they're instructive precisely because nobody talks about them. The model that decides whether you said the trigger phrase is small, has been stable for years, and doesn't need to reason about anything outside a few kilobytes of acoustic pattern. Hardening it into a low-power chip is a genuinely good trade, because the underlying task stopped moving before the chip got designed. Motion estimation in a video codec, parity checking, a fixed denoising filter on a known sensor: same shape. The function was solved, in the boring sense of solved, before anyone thought to cast it in silicon. Nobody demos these at a keynote.
Compare that to trying to do the same thing with a frontier language model. The industry's whole selling proposition is that this one reasons better than last month's, and next month's will reason better still. Hard-coding those weights isn't a hardware decision, it's a bet that the vendor is wrong about their own roadmap. And it's a bet nobody involved wants to make, because a chip vendor who sells you a fixed-function part is trading away the thing that actually makes them money: staying in the loop as the model changes, selling you the next accelerator when the next model needs one. A truly hard-coded model turns a subscription relationship into a one-time sale. That's a worse business, not just a worse bet.
There's a second cost that only shows up after the fact. A software bug in a deployed model gets a patch. A bias problem gets a retrain and a redeploy. A hard-coded model with either problem is a board full of expensive silicon that has to be thrown out, because the fix doesn't exist as a fix, it exists as a different chip. Nobody wants that liability sitting in a device with a five-year expected lifespan, which is most of the reason "AI accelerator" hardware today is reprogrammable rather than truly fixed: a matrix-multiply engine you can point at whatever weights ship this week, not a specific model burned into the die. The industry keeps building general-purpose fast paths and calling them AI chips, because building an actually specific one requires believing in a stopping point nobody's offering.
So the payoff for the real move, weights etched into silicon, only shows up on the tasks that were never going to be in a demo anyway. Keyword spotting. Fixed-grammar spam filtering. Some checksum-adjacent pattern match that hasn't needed a retrain since it shipped. Those are the tasks boring enough to actually be finished, and finished is the only condition under which the mask set is worth cutting. Everything getting funded and hyped right now is, by definition, not finished. That's what the funding is for.
The chips worth building are the ones nobody would put in a pitch deck.